The present invention relates to a monolithically integrable generator of a plurality of predetermined voltage values, especially for multilevel memories.
The present invention also relates to a method for generating a plurality of predetermined voltage values in a monolithically integrated electronic circuit.
Specifically the present invention concerns a programming voltage generator for non-volatile memories and more specifically for EEPROM memories with multiple logic levels.
The present invention also concerns a memory circuit incorporating a memory matrix and programming voltage generators of the above type. The following description is given with reference to this field of application with the main purpose of simplifying discussion thereof.
As is well known, in integrated circuits it is often necessary to have available a plurality of predetermined and discrete voltage values, readily distinguishable and accurately controllable. The voltage value is supplied to a user circuit and serves either as reference or as power supply for part of the circuit itself.
In particular in the present description reference is made to non-volatile memory circuits and specifically to multilevel memories requiring different programming voltages.
As known, multilevel memories are of great interest in the new technologies because they allow reduction of the size of the memory matrix. Indeed, in a multilevel memory it is possible to store a certain number of different logical states (more than two) in each individual memory cell. It is worth recalling that a memory cell is formed by means of a floating-gate MOS transistor and for each memory cell the logical states are distinct from the amount of charge stored in the floating gate. Standard non-multilevel non-volatile memories are programmed in two logical states which allow storage of one bit per cell. In the case of multilevel memories it is possible to distinguish more than two stored charge states and correspondingly it is also possible to program multiple logical states in each cell. For example where it is possible to distinguish four or sixteen states in a cell, each memory cell stores two or four bits in conformity with binary coding.
The logical states or levels correspond electrically to different threshold voltage values of the cell and therefore to different programming voltages which must be applied to terminals of a cell or to terminals common to a series (row/column) of cells. The terminals to which the programming voltages for a cell are applied are the control gate terminals and/or drain terminals, while for a row and/or column of cells they are respectively the "word line" and/or "bit line" terminals. To obtain multilevel programming it is necessary in any case to have predetermined voltage values available, distinguishable with sufficient accuracy. For a level to be distinct from the contiguous ones its range of variation must obviously be less than the separation between two contiguous levels. In this manner overlapping of the levels is avoided which would cause a resulting incorrect multilevel programming.
Generation of the voltage values necessary for programming a cell is dependent on the type of memory cell. In any case in any memory circuits at least one supply voltage Vcc is available, derived from an external line, and a programming voltage Vpp for programming the cells. The procedures for application of the programming voltage to the cell terminals are different. In the case of EPROM memories the programming voltage is generated externally. In the case of EEPROM memories, which are the preferred subject matter of the present patent proposal, the programming voltage Vpp is usually generated internally in the integrated circuit. The voltage is generated by means of a so-called voltage pump circuit. The power supply voltage Vcc, typically 5V, is applied to the input of the voltage pump circuit to produce at its output a higher voltage Vpp, typically variable in a range 5V to 20V. For multilevel EEPROM memories it is also necessary to have different voltage values Vppn actually applied to the cell for its programming. Incidentally, in the different applications, programming can require either positive or negative voltage values.
For generating the predetermined voltage values there have been already proposed different circuit solutions. The programming method for a multilevel EEPROM cell at the desired value is specifically dependent on the type of the cell. With reference to EEPROM memory cells of the FLOTOX type, a programming method is described e.g. in European patent application no. 93830172.8, filed Apr. 22, 1993 by this applicant. In this application, a circuit structure is described in which a capacitor, interposed between a drain node of a cell (i.e. the corresponding bit line) and a bit line voltage generator, acts as a programming voltage generator. By keeping the control gate of the cell polarized at a pre-set voltage value, there is charge injection in the floating gate by tunnel effect until formation of the channel in the cell and then discharge of the capacitor to ground with immediate interruption of programming. In this case the control gate voltage must be regulated with great accuracy.
A programming algorithm divided in several steps, preferably with a rough adjustment and a subsequent fine adjustment which is interrupted when the chosen level is reached, is illustrated for the same type of cell in U.S. Pat. No. 4,890,259. A similar regulation method in successive steps, for EEPROM memory cells with two polysilicon levels, is proposed in European patent application no. 93830061.3, filed Feb. 19, 1993 by this applicant. In this specific case a voltage at a node which absorbs current, during the writing step, is regulated with great accuracy.
Generation of voltage values Vppn, in conformity with the known techniques above mentioned, has the drawback that rather complex and sophisticated circuits have to be used to ensure adequate precision in distinguishing the logical levels to be stored. This entails technological efforts for realizing the generator, and requires manufacture of circuit elements by means of specific techniques different from those for forming the memory matrix.
In addition, voltage generators in accordance with the known art require waste of a large part of integrated circuit area because of the presence of a considerable number of components. Therefore the cost of the device containing a memory matrix of a given capacity increases.
The technical problem underlying the present invention is to conceive a monolithically integrable generator for the generation of a plurality of predetermined and discrete voltage values, whose circuit structure would be simple and easy to provide. In this manner it would be possible to lower the production costs of the device containing the generator. At the same time the generator which is the subject matter of the present invention must have structural and functional characteristics allowing good adjustment of the voltage levels generated thereby. A particular purpose is to make available a generator of a plurality of voltage levels for programming non-volatile memory cells. Preferably such a generator must be integrable in a memory circuit in a limited space of the semiconductor chip, using fabrication technologies not different from those used for the memory cells themselves.
The technical problem underlying the present invention is to provide a generator of predetermined and discrete voltage values by employing active elements exhibiting a voltage drop accurately predeterminable from their construction parameters. Each of the predetermined voltage values is a predetermined combination of the voltage drops obtained at the generator output from a certain number of these active elements.
A voltage generator in accordance with the present invention consists of different circuit branches, each of them comprising at least one of these active semiconductor elements. Each branch exhibits a pre-set voltage drop which, as already mentioned, can be regulated accurately. The branches are connected together and selectively activated to generate the predetermined voltage values as a combination of the individual voltage drops.
In accordance with a preferred embodiment MOS transistors are used as active elements, taking advantage of the fact that they are already present in the technology, especially in memory circuits. The latter is a preferred application for a generator in accordance with the present invention. It is possible to use simple MOS transistors because a diode-connected MOS transistor transfers to its own source a predeterminable voltage, equal to the voltage applied to the drain minus its threshold voltage, increased as a result of the well-known body effect.
On the basis of this solution idea the technical problem is solved by a generator of the type set forth above and defined in the characterizing part of claims 1 and following.
The technical problem is also solved by a method for generating a plurality of predetermined voltage values internally to a monolithically integrated electronic circuit, as defined in the characterizing part of claim 23.
The characteristics and advantages of the generator in accordance with the present invention are set forth in the description of an embodiment thereof given below by way of non-limiting example with reference to the annexed drawings.